Zhenghong Wang
Princeton University
USA

Ruby Lee
Princeton University
USA

Information leakage through covert channels and side channels is becoming a serious problem, especially when these are enhanced by modern processor architecture fea-tures. We show how processor architecture features such as simultaneous multithreading, control speculation and shared caches can inadvertently accelerate such covert channels or enable new covert channels and side channels. We first illustrate the reality and severity of this problem by describing concrete side channel and covert channel attacks. We identify two new covert channels. We show the orders of magnitude increase in covert channel capacities. We then present two solutions, Selective Partitioning and the novel Random Permutation Cache (RPCache). The RPCache can thwart all known cache-based software side channel attacks, with minimal hardware costs and negligi-ble performance impact.

Keywords: side channel attack, covert channel, cache, processor architecture

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