Read Paper (in PDF)
Guillaume Duc
ENST Bretagne
France
Ronan Keryell
ENST Bretagne
France
Several secure computing hardware architectures using memory encryption and memory integrity checkers have been proposed during the past few years to provide applications with a tamper resistant environment. Some solutions, such as Hide, have also been proposed to solve the problem of information leakage on the address bus.
However, in spite of the importance of these properties on secure computing architectures, no practical solution has been proposed to combine memory encryption, memory integrity checking and information leakage protection at a reasonable cost.
We propose the CryptoPage/HIDE architecture which implements these three mechanisms together with a low performance penalty (3% slowdown
on average).
Keywords: Trusted computing, secure processes, memory encryption, memory integrity, information leakage